??? 03/28/06 13:26 Modified: 03/28/06 13:31 Read: times |
#113294 - Explaination Responding to: ???'s previous message |
![]() With 8051 you have an address space of 65536 locations (64Kbyte), each one byte wide. In the example above this address space is divided into 8 sectors of 8192 locations each (8Kbyte). The 74HC138 helps to provide this decoding. Only one output is low at a time. (Please have a look at datasheet of 74HC138!). Remember, 1K is 1024, so 1Kbyte is 1024 bytes. So, if A13=A14=A15=0, then /CS input of 27C64 goes low and this chip is addressed. By the address lines A0...A10 then a certain location within the 27C64, one of 2^11 = 2048 is addressed. If A13=A14=A15=1 then the /CS input of ADC0804 goes low and this chip is addressed. Means the according write ot read instruction will address the ADC0804. You will see, that no further address line is needed to address the ADC0804. So, the ADC0804 looks like exactly one memory location, although 8192 different locations within this 8Kbyte sector could be addressed. Finally, if A13=A14=0 and A15=1 then the 82C55 is addressed. From the A0...A12 address lines only two lines are used to address different locations within the 82C55. So, again from the 8192 possible locations, which could be addressed in this 8Kbyte sector the most are wasted, only 4 addresses are used. This wasting of memory locations is possible, if you have enough memory space. In such a case you do not fully decode the memory space, but use a solution which uses a minmium number of chips. With this 74HC138 you could address 8 such chips, each with 8192 different memory locations inside. Whether you use them or not is on you. Kai |