| ??? 03/27/06 22:12 Read: times |
#113267 - RE: Don't look bad each others please Responding to: ???'s previous message |
Ok Cyrille,
Cyrille Ngassam said:
I know that the memory chip has the addresses pins and the data pins and others pins to be connected with the processor pins which can do the decoding I'm thinking about the 8051, but the way are differents if we use a microprocessor, this last one has not an embeded ports nor EEPROM. Well, every RAM and ROM chip(s) have Address and Data lines, and if you notice closely, they also have a CS line, short for CHIP SELECT. This line is used to enable this particular chip so the processor or controller can read or write to this device. Now, processors and controllers both have Address and data lines. So, RAMS and ROMs can be connected to both. Cyrille Ngassam said:
When we connect at least two EEPROMs or ROMs to a processor we need to select either that ROM or RAM chips without working with the other ROM or RAM chip(let say I want a memory map of 8k x 16 but I have on hand only 2k x 8 of chip memory RAM or ROM, now how to configure the hardware to choose to range on either the first two RAM or ROM chip or the last one?) sometimes I see ones use an OR guate to decoder and someone else use a NAND guate like Richard said before. . how do you reach at the conclusion that you will use A15 or A13... to decoder the address with the OR guate or NAND guate ? thanks all. Well, for thjis you will have to familiarize yourself with Binary and Hexadecimal number systems. Lets take a scenario for an example. You have a controller or processor that can address 64K of RAM. Now, we all know 64K (in decimal number systems) means 16 bits or 16 digits in binary system. Hence, your controller or processor has a 16-line Address bus. Now lets take for example you only need to connect 8K or RAM,, since you think this will be adequate fro your work and application. Now calculating 8K you get 8192 bytes (8 * 1024). 8192 bytes means only 13 bits or 13-lines of the address bus. You can also get how many 8K RAMS will be needed to make 64K, simply divide 64 by 8 and you get 8. Hence, by attaching eight 8K RAM ICs to the controller, you can make a 64K RAM for your controller / processor. Now, as far as decoding is concerned, well, you can easily attach the first 13 address lines to teh 8K RAM. This will enable you to select any of the 8192 byte locations within this RAM IC. Although this may work, the problem is that you have the upper 3 lines still left, and writing to the RAM IC with these 3 lines containing addres data will actually be treated as a write to only the lower 8K of RAM; unless you tell the controller / processor to ony write to teh RAM when the upper 3 lines have a particular patter of 1 and 0. Since in this case we want our RAM IC to be accessible only when the upper 3 lines have all 0s, you can OR the upper 3 lines and the output of the OR gate can be connected to the CS line of the RAM IC. Remember, the OR gate produces a 1 output when all or any of its inputs are at logic 1. So, the OR gate will give a 0 output when all the upper 3 lines are at logic 0, and since the CS line is supposed to be 0 to enable the RAM IC, this will work. I hope this answers your question, please tell us if it did. |
