He's using 74ALS-TTL, 74HCMOS and 6264/62256 memories, which are much faster today. And the AT28C256 and AT89C52 aren't very slowly either.

And, yes, each trace is as short as possible. But nevertheless the impedances are unpredictable, because the magnetic coupling of wires to solid ground plane is only minimal. A universe away from what can be achieved by a mulitlayer board! Think only about the unavoidable crossings of wires.
The same for the stray capacitances: Even if you route the wires over the ground plane, the distance will always be hugely greater than compared to a multilayer. So, you will suffer from much bigger charge injection into neighboured wires, because you loose the benificial shielding properties of a close solid ground plane.

1996 we had an EMC training, where we were demonstrated the poor EMC-performance of wire wrap designs and bread boards. We learned, that you can hardly succeed the CE radiation test with a wire wrap design, even if you use rather slowly chips.

There's a good reason, why wire wrap designs were used up to the eighties. Just because the price for a prototype multilayer board was astronomically high. A wire wrap design was the only suited methode to build a prototype. But EMC performance was and is lousy.

Kai