??? 03/15/06 13:24 Read: times |
#112224 - coments Responding to: ???'s previous message |
Serial ISD requires to have the "vehicle" (the "serial port"), and physical "connections" to all the resources inside the chip. This means some chip area increase, and also some speed penalty, as the "key points" have to be tapped at various points of the core and brought out usually to the chip's edge where the "extra" circuitry would sit.
look at SILabs, no "speed penalty", the "brought out" are "programming pins" needed anyhow. I expand your table Summary of pros (+) and contras (-): low cost high cost serial ISD monitor ICE ICE extra chip area needed - + - - speed penalty - + - - interrupt occupied + - +- - RAM/stack/code space occupied + - +- - vonNeumann code space needed + - * * single stepping, stop&run + + + + resources inspection + + + + breakpoints + - + + conditional breakpoints - - - + traces - - - + PC application needed v +- v v correctable - + + + download update w/o disconnect + ? + + pins occupied +- - - - various interface possible - + n/a n/a* irrelevant, the on chip memory is emulated v needed, but included in delivery Jan what does "correctable mean? a romulaor user please add a column someone please fix '?' in tyhe monotor column a comment: The Ceibo low cost emulators for the Philips pre SoftICE chips use some built in functions in the standard chips and are thus "universal for all", you just pop the chip out and insert another Philips derivative. Other emulators low or high cost use bondout chips and do thus need an additional "pod" if you want to emulate another derivative Erik |