I might have confused you. There is no part/macro like von Neumann RAM, it is only the way how a RAM is used. The generic '51 memory model is of Harvard type, i.e. separate data and code space, and there is no way to write into the code memory (as it was traditionally a ROM). The von Neumann RAM means, that the RAM is mapped both in code and data memory space (the simplest way to achieve this is to AND together /PSEN and /RD of '51 into /OE of RAM).

Of course there are other options in a custom '51 core, e.g. accessing the code memory via extra SFRs (address+data); of course the code memory has to be writeable (RAM or FLASH). It seems that Keil's Monitor/FlashMon provides for this model as well, as there is also "code memory write" routine in the said asm file, but you have to find out the details for yourselves (I never tried to play with it).

But if your '51 chip does not have code RAM nor EPROM/FLASH, where do you store the code, in ROM? In that case, I see little space to debug...

One remark, sometimes chips are designed with extra pads (e.g. for the external memory interface), which are not connected in the production version, but provide for a special "bondout" version with all pads connected for debugging. Of course the bonds cost silicon area so it is a matter of compromise.

Jan Waclawek