| ??? 08/11/06 17:51 Read: times |
#122083 - JTAG x Flash Data Retention Responding to: ???'s previous message |
Hi dear friends!
It seems that the root of the problem we are facing is wrong. So we could be discussing this for life-time, and wouldn't get to a conclusion. I hope that with this additional information we will be able to give a final point to this, as it seems to be getting a bit off-topic. As Erik suggested: Erik said:
Have you 'tested' that the flash caps are fully charged (i.e. that the code will still be there after 10 years) if so, please inform me how you did that. there's a misunderstanding about how Flash Data Retention can be compromised. The flash data retention of ATMEL MCUs can only be compromised if the programming voltage is not adequate, or the programming writing cycle is smaller than 4ms. As Jan have mentioned, this writing cycle is self-timed (to 8ms). With this self-timed cycle, and the specified programming voltage, ATMEL assures a 10 year data retention. The only way one could screw up the Flash Data retention would be to not provide the correct programming voltage, as there's no way to affect the 8ms internal timing. Any hypothetical (or not) case of incorrect programming procedure can only result in a wrong code programming, but cannot affect the Flash Data Retention time, because it cannot affect the MCU self-timed cycle. (Again, of course I'm considering you're applying the right programming voltage to the IC.) Resuming: The Flash Guaranteed Data Retention Time of ATMEL microcontrollers depends on two things: 1. The programming voltage applied to the MCU. 2. The IC self-timed programming cycle. So, the Flash Data Retention time of ATMEL microcontrollers cannot be affected by any JTAG one would like to use to program an ATMEL MCU, as long as it doesn't affects these 2 enumerated things. Erik said:
Have you 'tested' that the flash caps are fully charged (i.e. that the code will still be there after 10 years) if so, please inform me how you did that. Dear Erik, even if this was possible to test, it wouldn't be necessary, as long as the JTAG cannot affect that. I can understand your concern, because you should be referring to the old time EPROMs, as Jan mentioned, but this is not the case. So, for Flash Data Retention Time testing purposes, the JTAG schematic suggested to Tercio was really tested, as it doesn't disturbs the programming voltage applied to the MCU. All this information can be found at ATMEL site. Regards, Leonardo. |
