It's not difficult to read about it if you have some of the 805x-generation databooks.

I don'thave the databook in front of me right now, but IIRC, the 8155 and 8156 are I/O peripherals with RAM, which are directly compatible with Intel's version of the multiplexed address/data bus as was used with the 8085, 8086, 804x, 805x, etc. It differed from the 8255 in that it had direction-programmable I/O similar in a sense to what Motorola put in their 682x devices, along with the internally demuxed bus interface. The difference between the 8155 and 8156 was the sense of the chip select. Since many designers liked using the upper address byte as chip selects in order to save logic, one of each of these devices could be decoded using the same address lines. They'd work fine with as slow a clock as the OP indicated he was using.

RE