Talk of the devil and he turns up.

For formal verification of a fpga design you need to use a device called a test bench which is basically a peice of test code usualy written in your hardware description language which simulates plugging your 'device under test' into some system which is simulated by the test bench code.
You then device the test bench code so that it runs the 'device under test' under all possible conditions and gives a pass/fail result.
In your case your would write a test bench which simulates the processor running some test code in rom which exercises every op cope and logs the results.
Many times the test bench for such a system is more complex than the device under test,however I have done this before so if you want someone to write a suitable test bench for you for some suitable amout of beer tokens get in touch.