Stefan,

I just repeated your experiment with my Crystal CS5532 circuit. I used a 2kg bench scale cell and scaled it to read 30,000.0 with a 2mV/V (2kg) load. Killed all the post-ADC filtering and got:
At 30kg - +/-3.5g
At Zero - +/-0.3g
At 116g - +/-0.4g
These are crudely observed peaks, looking at an accumulation of ~100 0.3s samples (actual ADC sample rate is 50sps - my display samples are every 15th sample - no averaging or filtering - I just checked every sample and there is no worse variation).

I was suspicious of my cell with its 2kg load - a pretty good accelerometer - so plugged in the simulator and got:
At 30kg - +/-0.4g
At Zero - +/-0.1g
The variation of the 30kg is low frequency - period >10s (as prev discussed). My simulator is of my own design, but is as repeatable (but not so versatile) as the HBM 'standard'.

These are excellent results for such an ADC - ~+/-1/100,000 - i.e. about 16 or 17 bits (18 - as it's in bipolar mode). I don't believe it would be easy to better.

Dave