??? 02/12/07 01:53 Read: times |
#132573 - That's not clear to me. Responding to: ???'s previous message |
I' concerned, of course, that so many people have encountered reset problems with this (805x) series of MCU's, while they seldom aries in others. I always view positive-going reset and iterrupts with suspicion. I think it's a stupid, Stupid, STUPID thing to do under any circumstances. Nevertheless, we're stuck with it.
Reset IC's became popular at about the same time as SMPS availability and pricing became attractive, and it's no coincidence that FLASH memory became popular at about the same time. I suspect there's a link there. People began using SMPS' and found that their FLASH memory was becoming corrupted. They blamed the MCU reset. They tried fixing it with Reset chips. That satisfied some people. It's continued to be a problem, though. At about the same time, small MCU-based systems using those weak-kneed "wall-wart" supplies became popular, too. I suspect that, since this problem apparently persists, there's a linkage there that hasn't been adequately explored. I'd be interested to know what the statistical distribution of power supply type and output strength is across the spectrum of applications that experience RESET difficulties. I'd also be interested to know what the distribution of unmangageable RESET problems with MCU's equipped with RESET IC's but using wall-wart or SMPS for Vcc happens to be. I do think that there's an inherent design flaw in the 805x series, which affects the way in which Vcc, the crystal oscillator, and reset interact. I think that if one switched a solid Vcc to the MCU in, say a microsecond or less, counted the oscillator cycles externally and generated a 25-cycle-long reset pulse from that, it might shed some light. The key is having a dead-quiet Vcc supply capable of charging the, say, 10000 microfarads of capacitance on a large board and still producing a 1 uS rise time on Vcc to the MCU. The key, is in the "dead-quiet" rather than in the strength of the Vcc supply, however. I doubt this will ever be achieved with any low-frequency (below 5 MHz) SMPS without extensive output filtering. RE |