??? 12/04/05 16:58 Read: times |
#104666 - Interrupt latencies Responding to: ???'s previous message |
Erik asked Ian how long interrupts are disabled here http://www.8052.com/forum/read.phtml?id=104660
When evaluating the suitability of applying an RTOS to any project and platform, one of the most important measurements (for me, at least) is interrupt latency. There is always latency introduced by a CPU/MCU, so we'll leave that out. For those who have information about particular RTOS performance, I was thinking we might list some performance numbers in this sub-thread. For example, back in 1997, I queried CMX about how long they disable interrupts for themselves: Date: Tue, 29 Apr 1997 12:07:20 -0400 From: chuckb@cmx.com (cmx) Subject: Re: CMX info request ===SNIP=== >Is the Dallas Semi. 80C320 supported? That is, does a context switch >save/restore this part's second DPTR? Yes, we definitely support the dual DPTR's (i.e. save/restore them). >You state low interrupt latencies. For how long are interrupts disabled? 15 cycles. |