| ??? 03/06/06 16:45 Read: times |
#111398 - the original problem Responding to: ???'s previous message |
Erik Malund said:
Mine does do insertion check, I am told every time I insert the chip backwards. It tells you so half of the time, if you do it as my boss does :-))) Neverhteless, the original problem is in reading in the last bit (first bit? does it read LSB or MSB?) as logic 1 erratically, with ISP (not parallel programming); couldn't this be some combination of long cable, bad pullups, incorrect power supply and incorrect timing (e.g. bad ratio of processor's crystal and the ISP software clock)? Actually, we were not told by Ezequiel what hardware does he use... Jan Waclawek |
| Topic | Author | Date |
| AT89S52 signature | 01/01/70 00:00 | |
| Throw away... | 01/01/70 00:00 | |
| naah | 01/01/70 00:00 | |
| worse programmer? | 01/01/70 00:00 | |
| different messages, nothing else | 01/01/70 00:00 | |
| the original problem | 01/01/70 00:00 | |
| i tried to explain the whole situatuion | 01/01/70 00:00 | |
| do you have an oscilloscope? | 01/01/70 00:00 | |
| that would be a stupid chip design | 01/01/70 00:00 | |
Make that sense? | 01/01/70 00:00 | |
| Is it you, Erik Malund? | 01/01/70 00:00 | |
| it seems possible | 01/01/70 00:00 | |
| Why not using a fresh ZIF? | 01/01/70 00:00 | |
| the generation using these micros use so | 01/01/70 00:00 | |
| Sockets, or how I lost the precision... | 01/01/70 00:00 |