| ??? 02/10/06 14:00 Modified: 02/10/06 14:23 Read: times |
#109703 - Re Erik Responding to: ???'s previous message |
Erik Malund said:
what advantages? 1) no difference If you use different chips, you must also learn and implement different HW-I2C. E.g. only on Philips devices there are four (or more ?) different HW-I2C implemented. On software I2C you must only watch the different ways to use a port pin as open drain. Erik Malund said:
2) who cares It cares me, because I use not only a single 8051 derivate and not only 8051. Erik Malund said:
5) know of none in HW IIC I tested the HW-I2C of the ATMega8 and it can enter a state, where SDA was pulled low forever without generating an interrupt. Thus I know minimal one device with HW-I2C bugs. Erik Malund said:
7) how can you have an IIC interrupt w/o IIC HW? I meant, only if you implement a more complex interrupt driven HW-I2C you can use the I2C transfer time to do other things. So on the typical polled transfer approach the HW-I2C was no faster than the SW-I2C. Erik Malund said:
And I repeat if you, for whatever reason am using a uC without HW IIC there is, of course, no reason not to go bit0bang. You may be surprised, but if I use a new chip I use always my easy to use and portable and well proven SW-I2C. Only if I need the multimaster or slave mode, only then I do the additional work and learn its new HW-I2C. Thus I have many projects, where the internal HW-I2C rest in peace but the SW-I2C works fine. Peter P.S.: My colleague program the LPC2292 (Philips ARM with internal HW-I2C) and use also SW-I2C on it because he save lot of development time by copying the SW-I2C routine instead writing a new routine. |
