| ??? 10/04/07 23:34 Read: times |
#145435 - What I interpret Responding to: ???'s previous message |
i think what they're suggesting is that if you have an initial compare value of 0 then start the timer you will most likely get an immediate interrupt. Otherwise having a zero sensitivity for a compare register is mighty inconvenient. Its an easy enough situation to write test code for so you can verify the situation. |
| Topic | Author | Date |
| Atmel PCA: CCAPnL/H must be non zero, why ? | 01/01/70 00:00 | |
| the PCA cookbook | 01/01/70 00:00 | |
| Intel cookbook | 01/01/70 00:00 | |
| What I interpret | 01/01/70 00:00 | |
| you are right ! | 01/01/70 00:00 | |
| I like to be... | 01/01/70 00:00 | |
| engines | 01/01/70 00:00 | |
| what is ML4.1 ? | 01/01/70 00:00 | |
| ML4.1 | 01/01/70 00:00 | |
ML4.1, more | 01/01/70 00:00 |