| ??? 10/04/07 09:15 Read: times |
#145376 - Atmel PCA: CCAPnL/H must be non zero, why ? |
Hi everybody.
This is my first post here. I'm using a AT89C51RB2 derivative (a ROM version) with PCA. I'm re-programming a Bosch Motronic car engine management computer running at 10Mhz. As my kernel is very flexible I'm very tight in CPU time and I'm trying to save every CPU cycle. I'm using PCA in the Compare Mode (you set a value and when the PCA conter reaches it an interrupt request is generated). The Atmel datasheet states the following: Before enabling ECOM bit, CCAPnL and CCAPnH should be set with a non zero value, otherwise an unwanted match could occur. Writing to CCAPnH will set the ECOM bit. I did not find any example of PCA programming on the Atmel site. I find this rule surprising and just can not imagine an implementation (design) reason for it. Up to know I've been stupidly setting ACC.0 bit to '1' after having set a CCAPnL register. But it costs me 1 cycle and I'd like to get rid of it. I'm even not sure my understanding of the rule is right, as somebody could say that both regs must be non zero. Does somebody know if the rule is true ? Could someone explain me its reason. Thanks, Alexis |
| Topic | Author | Date |
| Atmel PCA: CCAPnL/H must be non zero, why ? | 01/01/70 00:00 | |
| the PCA cookbook | 01/01/70 00:00 | |
| Intel cookbook | 01/01/70 00:00 | |
| What I interpret | 01/01/70 00:00 | |
| you are right ! | 01/01/70 00:00 | |
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| ML4.1 | 01/01/70 00:00 | |
ML4.1, more | 01/01/70 00:00 |