| ??? 11/09/05 13:15 Read: times |
#103475 - the 4 JTAG pins Responding to: ???'s previous message |
Erik Malund said:
The SILabs f12x JTAG interface uses TCK TMS TDO TDI, where is the "dedicated to this function" You cannot use these four pins for other purpose than JTAG, can you? In a 64-100 pin package 4 pins is maybe not an issue, however, you pay the price of the pins (bonding, silicon space below pads etc.) so why would you waste it for a function (i.e. programming) you use only once in a lifetime? Even more, why would you waste more silicon for the JTAG state machine and registers, if you would not use it for automated testing? An example of JTAG pins sharing (hence the IEEE1149 standard violation) are the STM uPSD3xxx's (and their predecessors, the WSI PSD's) - they can be set up so that the JTAG pins cease to be JTAG pins and as JTAG is the only way to program these devices you can turn them quite easily into dumb pieces of silicon+plastic (as we did with a couple of PSD812's until we learned the lesson the hard way...) Jan Waclawek |
| Topic | Author | Date |
| Universal JTAG Hardware? | 01/01/70 00:00 | |
| the debug/programming is nonstandard so | 01/01/70 00:00 | |
| Several with JTAG | 01/01/70 00:00 | |
| what is universal? | 01/01/70 00:00 | |
| Universal | 01/01/70 00:00 | |
| as far as the cable, why not, that is in | 01/01/70 00:00 | |
| Choice of words! | 01/01/70 00:00 | |
| that would be silly from SiLabs | 01/01/70 00:00 | |
| HUH? | 01/01/70 00:00 | |
| the 4 JTAG pins | 01/01/70 00:00 | |
| Ok | 01/01/70 00:00 | |
debug | 01/01/70 00:00 | |
| Silly seems to fit | 01/01/70 00:00 | |
| Now this sounds really silly... | 01/01/70 00:00 |