| ??? 10/07/05 00:02 Read: times |
#102051 - programming Xilinx CPLDs Responding to: ???'s previous message |
Oleg Sergeev said:
Does Xilinx not provide another interface to download configuration into CPLD? Depends on the specific part family. CoolRunner XPLA3 CPLDs are programmed using JTAG, as are Altera MAX 2s. Older devices used various proprietary serial bit-bang mechanisms. JTAG is very convenient. Modern FPGAs can be configured from an EEPROM or a microcontroller using a handful of different mechanisms. They can also be programmed using JTAG, but of course the configuration goes away when power is removed. The FPGA config EEPROMs are now all programmable using JTAG. JTAG is great because it's not vendor dependent. I've had Lattice and Altera parts on the same JTAG chain and it works just fine. -a |
| Topic | Author | Date |
| Using 8051 to program CPLD via JTAG | 01/01/70 00:00 | |
| Eh??? | 01/01/70 00:00 | |
| Reply | 01/01/70 00:00 | |
| Don't hurt yourself | 01/01/70 00:00 | |
| Ouch! | 01/01/70 00:00 | |
| Regarding XAPP058 | 01/01/70 00:00 | |
| ????????????????? | 01/01/70 00:00 | |
| It's a interpreter of XSVF | 01/01/70 00:00 | |
| why JTAG? | 01/01/70 00:00 | |
| Yes, but... | 01/01/70 00:00 | |
| not seeing the forest for the trees or w | 01/01/70 00:00 | |
| Several reasons... | 01/01/70 00:00 | |
| CPLD programming | 01/01/70 00:00 | |
| programming Xilinx CPLDs | 01/01/70 00:00 | |
| XSVF Executor! | 01/01/70 00:00 | |
| XSVF Executor | 01/01/70 00:00 | |
| XSVF Executor | 01/01/70 00:00 | |
| Using 8051 to program CPLD via JTAG | 01/01/70 00:00 | |
Yeah well | 01/01/70 00:00 |