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???
09/06/05 20:35
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#100719 - CPLD programming
Responding to: ???'s previous message
Oleg Sergeev said:
Does Xilinx not provide another interface to download configuration into CPLD? For example, Altera ACEX1K provides some ways: JTAG, serial shift and parallel loading.

No there are no alternatives and that might have historical reasons.

There are quite significant differences between CPLDs and FPGAs in architecture and in usage as well. As CPLDs are programmed usually only once - at manufacturing time, there is obviously no effort to make it more comfortable to the user and the interface which is supposed to be used routinely for boards testing (which JTAG was aimed to initally - boundary scan) is employed.
On the other hand, CPLD programming is relatively lengthy compared to FPGAs (and taken into account the amount of information programmed / logic density), as the former are usually EEPROM-based (so it takse time to program a cell), the later are RAM-based; so there must be a "feedback mechanism" to determine the programming end; which might be not so easy to implement in a different interface (I don't say it's impossible).

For a project I have converted the app058 code to asm'51 and downloaded CPLDs sending out the XSVF via serial port and later reading it from a compactflash. It worked but I never really finished this project to publish-able/sell-able state (my employee lost interest in it). But I remember the app058 C-code to be PC-centric (although they mention 8051 in the appnote itself); for example it by default assigned huge parts of memory for the read vectors (tens of kilobytes, if I recall right). So it definitively needs rework.


Jan Waclawek

List of 19 messages in thread
TopicAuthorDate
Using 8051 to program CPLD via JTAG            01/01/70 00:00      
   Eh???            01/01/70 00:00      
      Reply            01/01/70 00:00      
   Don't hurt yourself            01/01/70 00:00      
      Ouch!            01/01/70 00:00      
      Regarding XAPP058            01/01/70 00:00      
         ?????????????????            01/01/70 00:00      
         It's a interpreter of XSVF            01/01/70 00:00      
   why JTAG?            01/01/70 00:00      
      Yes, but...            01/01/70 00:00      
         not seeing the forest for the trees or w            01/01/70 00:00      
            Several reasons...            01/01/70 00:00      
      CPLD programming            01/01/70 00:00      
      programming Xilinx CPLDs            01/01/70 00:00      
   XSVF Executor!            01/01/70 00:00      
      XSVF Executor            01/01/70 00:00      
         XSVF Executor            01/01/70 00:00      
   Using 8051 to program CPLD via JTAG            01/01/70 00:00      
      Yeah well            01/01/70 00:00      

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