| ??? 05/11/07 07:07 Modified: 05/11/07 07:08 Read: times |
#139033 - XOR using NAND |
Hi,
I was going through the different logic gates implementation using NAND and NOR gates. I came accross the XOR implementation using 4 NAND gates (diagram given below). But when i implemented iam getting 6 NAND gates. 
So, can any one tell me the method by which the above design is implemented? What i did was: inputs were given to AND gate and NOR gate, and there outputs are connected to a NOR gate. I am getting 6 NAND gates for this type of implementation. regard's Suresh. |
| Topic | Author | Date |
| XOR using NAND | 01/01/70 00:00 | |
| Implemented in what? | 01/01/70 00:00 | |
| Its just self study.. | 01/01/70 00:00 | |
| as I said REDRAW IT | 01/01/70 00:00 | |
| Do the algebra! | 01/01/70 00:00 | |
| Got That. | 01/01/70 00:00 | |
| For Future Reference | 01/01/70 00:00 | |
| Thank You! | 01/01/70 00:00 | |
| Back-to-Basics: DeMorgan's Theorem | 01/01/70 00:00 | |
| this is all obvious, aside from the missing detail | 01/01/70 00:00 | |
| Detail provided | 01/01/70 00:00 | |
| confusing ... | 01/01/70 00:00 | |
| I think | 01/01/70 00:00 | |
| I can see that, I guess. | 01/01/70 00:00 | |
| Yes, easily conceivable... | 01/01/70 00:00 | |
| there are many ways to skin a cat | 01/01/70 00:00 | |
| If you trust... | 01/01/70 00:00 | |
| I have some swampland in Florida to sell | 01/01/70 00:00 | |
It's always going to be used ... | 01/01/70 00:00 | |
| Yes, you will hardly find 4 NANDs, in fact | 01/01/70 00:00 | |
| redraw | 01/01/70 00:00 | |
| You must expand some terms... | 01/01/70 00:00 |