Hi Dave,

I'm working now to make the DS80C320
IAP (in application programmable).
Normally you need 5 chips:
CPU,
Address Latch,
Address Decoder,
Boot EPROM,
Download Flash

But I found a 3 chip solution:
DS80C320,
PZ50C32 (Coolrunner CPLD),
AT29C512

The CPLD make the following things:
- Address Latch
- write protection of boot sector in Flash (F000-FFFFh)
- code PROM (44 byte) for programming a Flash page (128 byte)
- redirection of the reset vector (to Flash at 0F003h)
- 13 macro cells and 7 I/O usable for whatever
or 45 macro cells on the PZ50C64 (e.g. for a 3. UART or I2C)

The only restrictions are:
- only 60kB user code space (0000-EFFFh)
- the user code must start with a LJMP on the reset vector (0000h)

one Advantage:
- the user can call the copy RAM to Flash routine at 0F000h
to store nonvolatile data in code space.

Status now:
- the coolrunner was ready
- the bootloader must be written (usable with my UNIPROG.EXE)
- the hardware must be build

If it was made ready, I place it (hex, jedec files and the sheet)
on my web.
Any E-mail of interest can accelerate my work on this.


Peter