| ??? 04/26/07 15:24 Read: times |
#138040 - debug possibilities? Responding to: ???'s previous message |
Attila Strba said:
And now with an ASIC nearly without any debug possibility on SW level.... A spare UART and some free space will allow you to use a rudimentary monitor. That might help a lot, if nothing else is available. It might be any other "channel" not only UART. Signalling over a single pin, software timed, is quite viable. This will not help you with the interrupt pitfalls, though. Nevertheless, if you'll be in troubles, you can always come here for a few harsh words... :-) JW |
| Topic | Author | Date |
| Serial transmission in scheduller instead of int | 01/01/70 00:00 | |
| danger, maybe, loss of efficiency YES ABSOLUTELY!! | 01/01/70 00:00 | |
| avoiding interrupts means... | 01/01/70 00:00 | |
| Scheduller.... | 01/01/70 00:00 | |
| there is no such thing | 01/01/70 00:00 | |
| Limitation API | 01/01/70 00:00 | |
| API? | 01/01/70 00:00 | |
| Yes ASIC design fixed... | 01/01/70 00:00 | |
| debug possibilities? | 01/01/70 00:00 | |
Monitor is nice idea | 01/01/70 00:00 | |
| 1ms vs 1.04ms | 01/01/70 00:00 | |
| absolutely NOT | 01/01/70 00:00 | |
| ok but 1 byte is transmitted together | 01/01/70 00:00 | |
| if it does, then you need to KISS | 01/01/70 00:00 | |
| I took the 1ms processing tick for granted... | 01/01/70 00:00 | |
| Thanks for the inputs... | 01/01/70 00:00 |