Email: Password: Remember Me | Create Account (Free)

Back to Subject List

Old thread has been locked -- no new posts accepted in this thread
???
04/10/06 16:01
Read: times


 
#113988 - since you did not have the time to find
Responding to: ???'s previous message
since you did not have the time to find it yourself in "the bible" I did it for you

the “X” appended to MOV. There are two types of instructions, differing in whether they provide an
eight-bit or sixteen-bit indirect address to the external data RAM.
In the first type, the contents of R0 or R1 in the current register bank provide an eight-bit address
multiplexed with data on P0. Eight bits are sufficient for external I/O expansion decoding or for a relatively
small RAM array. For somewhat larger arrays, port pins can be used to output higher-order address bits.
These pins would be controlled by an output instruction preceding the MOVX.
In the second type of MOVX instruction, The Data Pointer generates a sixteen-bit address. P2 outputs the
high-order eight address bits (the contents of DPH) while P0 multiplexes the low-order eight bits (DPL)
with data. The P2 Special Function Register retains its previous contents while the P2 output buffers are
emitting the contents of DPH. This form is faster and more efficient when accessing very large data arrays
(up to 64k bytes), since no additional instructions are needed to set up the output ports.
It is possible in some situations to mix the two MOVX types. A large RAM array with its high-order address
lines driven by P2 can be addressed via the Data Pointer, or with code to output high-order address bits to
P2 followed by a MOVX instruction using R0 or R1.

List of 28 messages in thread
TopicAuthorDate
unclarity with movx instruction            01/01/70 00:00      
   Speed up            01/01/70 00:00      
      Mistake            01/01/70 00:00      
   Clarity prevails!            01/01/70 00:00      
      Quicker?            01/01/70 00:00      
         Quicker!            01/01/70 00:00      
            assumption...            01/01/70 00:00      
            Finally, you are right!            01/01/70 00:00      
   MOVX @Ri            01/01/70 00:00      
      since you did not have the time to find            01/01/70 00:00      
      wrong answer            01/01/70 00:00      
         Typo            01/01/70 00:00      
         thanks Erik for the correction            01/01/70 00:00      
   It is set to P0            01/01/70 00:00      
      wrong again            01/01/70 00:00      
         Yes I am            01/01/70 00:00      
   an example            01/01/70 00:00      
      Internal XRAM            01/01/70 00:00      
         not really            01/01/70 00:00      
            Ports' SFR are set to 1            01/01/70 00:00      
               not a port, a "page SFR"            01/01/70 00:00      
         P2?            01/01/70 00:00      
            Doh!            01/01/70 00:00      
   which derivative            01/01/70 00:00      
      do not allow?            01/01/70 00:00      
         AT89S8252            01/01/70 00:00      
            Aaaaah, so. Thanks.            01/01/70 00:00      
   Tanks            01/01/70 00:00      

Back to Subject List