| ??? 04/10/06 15:48 Read: times |
#113978 - Clarity prevails! Responding to: ???'s previous message |
Markus Kammersberger said:
Hello,
i wondered about the movx instruction in combination with the addressing mode using R0 and R1. I want to store the value of the accumulator into external RAM. I know this works with "MOVX @DPTR,A", but what is the other instruction "MOVX @R0,A" for? This is what Keil (among others?) call "PDATA" It effectively gives you access to a single 256-byte "page" of XDATA. MOVX @Rn is quicker & more compact than MOVX @DPTR because you only use a single address byte. In the instructionset i found this declaration:
>MOVX @R0,A > >If operand1 is @R0 or @R1, the Accumulator is moved >to the 8-bit External Memory address indicated by >the specified Register. This instruction uses only P0 >(port 0) to output the 8-bit address and data. >P2 (port 2) is not affected. If operand2 is @R0 >or @R1 then the byte is moved from External Memory >into the Accumulator. What happens with the high byte of the address? This is answered by the part that I've highlighted for you. Is it set to 0? No - see above Is it set to the same value as the high byte of DPTR? No - see above Does it mean, that i only can address the first 256 byte of extenal RAM? Not quite: it means that you can access a single 256-byte "page" of XDATA - where in XDATA that page might appear is up to you. What happens if i have several peripherals mapped to the external RAM area (e.g. RAM, LCD, Flash, ...)? Same as for any other application that mixes memory-mapped peripherals and external RAM! Do i have to use a kind of bankswitching by setting the high byte of DPTR first? Not quite: You need to ensure that the high address byte is appropriate; eg, by setting P2. is the area addressed by using this operation an special area of 256 byte not really located in external RAM that only can be accessed via this algorithm? No - it is just another way of acessing exactly the same physical address space, but quicker & more compact. How is IRAM addressed and where is it located? This is a completely different question, and depends on exactly what you mean by "IRAM". If you mean the 8052 core's internal RAM, it is accessed using the MOV instructions. |
| Topic | Author | Date |
| unclarity with movx instruction | 01/01/70 00:00 | |
| Speed up | 01/01/70 00:00 | |
| Mistake | 01/01/70 00:00 | |
| Clarity prevails! | 01/01/70 00:00 | |
| Quicker? | 01/01/70 00:00 | |
| Quicker! | 01/01/70 00:00 | |
| assumption... | 01/01/70 00:00 | |
| Finally, you are right! | 01/01/70 00:00 | |
| MOVX @Ri | 01/01/70 00:00 | |
| since you did not have the time to find | 01/01/70 00:00 | |
| wrong answer | 01/01/70 00:00 | |
| Typo | 01/01/70 00:00 | |
| thanks Erik for the correction | 01/01/70 00:00 | |
| It is set to P0 | 01/01/70 00:00 | |
| wrong again | 01/01/70 00:00 | |
| Yes I am | 01/01/70 00:00 | |
| an example | 01/01/70 00:00 | |
| Internal XRAM | 01/01/70 00:00 | |
| not really | 01/01/70 00:00 | |
| Ports' SFR are set to 1 | 01/01/70 00:00 | |
not a port, a "page SFR" | 01/01/70 00:00 | |
| P2? | 01/01/70 00:00 | |
| Doh! | 01/01/70 00:00 | |
| which derivative | 01/01/70 00:00 | |
| do not allow? | 01/01/70 00:00 | |
| AT89S8252 | 01/01/70 00:00 | |
| Aaaaah, so. Thanks. | 01/01/70 00:00 | |
| Tanks | 01/01/70 00:00 |