| ??? 03/16/05 20:20 Read: times |
#89804 - Why not HW I2C or SPI Responding to: ???'s previous message |
I don't have HW I2C on both ends. I could bit-bang a master and do h/w I2C slave on the other, but I would like it to be faster than that and I'd like both ends to be able to initiate transactions.
SPI is also a possibility. CPU A has SPI that it is using for a communications interface on it's other side. CPU B has SPI available, but really, the arbitration issues are similar. CPU A is an SPI master to a communications controller and when it's not doing that (which is most of the time) it could be SPI master or slave to CPU B. But I mentioned that both CPU A or B could be generating data that the other needs, so again some kind of arbitration (request/grant) scheme is required. Otherwise the SPI could run a byte in one direction, but how would it know if there was anything valid coming back? BTW I don't need full duplex. GB |
| Topic | Author | Date |
| Contemplating multiprocessor | 01/01/70 00:00 | |
| fifo | 01/01/70 00:00 | |
| and also | 01/01/70 00:00 | |
| multiprocessor communication | 01/01/70 00:00 | |
| ACKs | 01/01/70 00:00 | |
| You want it all and you want it for free | 01/01/70 00:00 | |
| Why not HW I2C or SPI | 01/01/70 00:00 | |
| Why not HW I2C or SPI | 01/01/70 00:00 | |
| USB ??? | 01/01/70 00:00 | |
| USB !!! | 01/01/70 00:00 | |
| USB | 01/01/70 00:00 | |
| You Correct Sir | 01/01/70 00:00 | |
| USB != I2C | 01/01/70 00:00 | |
USB > I2C | 01/01/70 00:00 | |
| do not multimaster | 01/01/70 00:00 | |
| hmm | 01/01/70 00:00 | |
| concurrence | 01/01/70 00:00 | |
| This is why | 01/01/70 00:00 | |
| depends on data rate | 01/01/70 00:00 | |
| Normally | 01/01/70 00:00 | |
| Are You Sure | 01/01/70 00:00 | |
| I would be | 01/01/70 00:00 | |
| I would be | 01/01/70 00:00 | |
| it works for me | 01/01/70 00:00 | |
| Are You Sure | 01/01/70 00:00 | |
| IIC speed - no limit | 01/01/70 00:00 | |
| nixed by other team members | 01/01/70 00:00 | |
| Multi-Proc Xface | 01/01/70 00:00 | |
| exactly | 01/01/70 00:00 | |
| Shift register (Mode 0)? | 01/01/70 00:00 | |
| Time savers | 01/01/70 00:00 |