| ??? 08/03/07 07:00 Read: times |
#142687 - yes, relevance. Responding to: ???'s previous message |
Richard Erlacher said:
Unfortunately, neither of the examples you cite have anyting to do with either RC reset or a supervisor. The second example shows the inadequacy of RC reset quite clearly; as well as shows how the problem is completely removed by proper use of a reset IC. Richard Erlacher said:
I suspect that any number of failures may be attributed to RESET failure due to lack of careful observation. When a supervisor is added, the circuit is changed, and, even the reset behavior may be changed. Does that mean that the problem initially gaining attention was repaired? That's not certain at all! Richard, this slightly insults our engineering capabilities. What sort of proof would persuade you that: 1. without a proper reset, you are in troubles 2. with a proper reset, you still might be in troubles (as there are other influences to the circuit, in extremum, if I smash it with a sledgehammer, even a reset IC won't guarantee proper operation), but if everything else is OK, you are safe. Richard Erlacher said:
Your examples do point up a potentially serious problem, namely that different components will behave differently as power is lost. CMOS MCU's can tolerate quite low voltages, and, additionally, can draw power from their inputs. Sure. As I stated above, the reset not protecting the MCU; it's protecting the peripherals (including memories). Richard Erlacher said:
Perhaps more attention should be given to Vcc rise and fall times, and management of the entire system during brownout and not just the MCU. Yes and not. You can relatively simply influence the minimum rise/fall times of VCC - simply add more capacitance. In most of the applications you cannot (or is very impractical to) influence the maximum rise/fall times of VCC; the circuit shall handle any. JW |
