| ??? 05/14/06 17:18 Read: times |
#116186 - No P2 worries Responding to: ???'s previous message |
Matthias Arndt said:
I assumed that the value becomes overwritten when using the MOVC A,@A+DPTR instruction next time as DPH will be put on P2 as well. Not a concern. Clarification comes from the "8051 Family Hardware Description": Whenever a 16-bit address is used, the high byte of the address comes out on Port 2, where it is held for the duration of the read or write cycle. Note that the Port 2 drivers use the strong pullups during the entire time that they are emitting address bits that are 1s. This is during the execution of a MOVX @DPTR instruction. During this time the Port 2 latch (the Special Function Register) does not have to contain 1s, and the contents of the Port 2 SFR are not modified. If the external memory cycle is not immediately followed by another external memory cycle, the undisturbed contents of the Port 2 SFR will reappear in the next cycle. |
| Topic | Author | Date |
| interrupt table copy | 01/01/70 00:00 | |
| optimisation | 01/01/70 00:00 | |
| yes i had that in mind but... | 01/01/70 00:00 | |
| No P2 worries | 01/01/70 00:00 | |
| thanks for making this clear! | 01/01/70 00:00 | |
| single chip solutions | 01/01/70 00:00 | |
| Ofcourse | 01/01/70 00:00 | |
| Why does it need optimising? | 01/01/70 00:00 | |
| Not necessarily! | 01/01/70 00:00 | |
| are you sure this is OK? | 01/01/70 00:00 | |
| THANKS! | 01/01/70 00:00 | |
| >256 byte long table | 01/01/70 00:00 | |
| I'll give it a go... | 01/01/70 00:00 | |
| worked! | 01/01/70 00:00 | |
| Re: >256 byte long table | 01/01/70 00:00 | |
| not quite this issue | 01/01/70 00:00 | |
issue resolved | 01/01/70 00:00 |