| ??? 02/27/06 15:33 Read: times |
#110852 - Slower, too Responding to: ???'s previous message |
The interposition of a level-shifting buffer would slow the signal propagation down somewhat as well. If there's time-budget for that in the externl circuitry, probably designed for a slower device, then that might work, but methinks the clamps have less impact on timing.
RE |
| Topic | Author | Date |
| >10 MIPS micro with 3.3V supply? | 01/01/70 00:00 | |
| SILabs | 01/01/70 00:00 | |
| he wants a drop-in replacement | 01/01/70 00:00 | |
| Drop-in replacement | 01/01/70 00:00 | |
| then you did not "design" but "test" | 01/01/70 00:00 | |
| And... | 01/01/70 00:00 | |
| what is the "overlooked performance issu | 01/01/70 00:00 | |
| DIL? | 01/01/70 00:00 | |
| you could try here | 01/01/70 00:00 | |
| Thanks to all.. | 01/01/70 00:00 | |
| that's life | 01/01/70 00:00 | |
one final thought | 01/01/70 00:00 | |
| shame youve done the board | 01/01/70 00:00 | |
| There is a way ... | 01/01/70 00:00 | |
| for level conversion the 74lvc4345 is ny | 01/01/70 00:00 | |
| Slower, too | 01/01/70 00:00 |