??? 02/04/06 08:23 Read: times |
#109164 - Polling vs interrupts in a chess clock. |
I'm designing a chess clock which is basically two LCDs with two related pushbuttons (PBs). Only one clock is active at a given time and it decrements at one second intervals. When the active clock's PB is pressed it stops decrementing and the other starts. When one clock reaches zero it just stops -- it's the player's duty to notice that he's run out of time.
At first I just assumed the way to go was to assign external interrupts (INT0/1) to the PBs and have one or two ISRs handle the LCDs. This is prob. because of my background in "real-computer" programming, but it does seem to be at least somewhat supported by various 8051 books and tutorials. However I understand from previous threads that you guys frown upon it, at least most of the time. Some considerations that I can think of are: Pro interrupts: this will be battery operated and I might power it down between seconds when the active display is changed; Con: maybe it would need de-bounce hardware for the PBs (not a major problem). Actually I see from an old post a way to avoid this. Con: maybe the ISR will have a problem controlling the LCDs; I understand its functionality is pretty restricted. I would be most interested in hearing of more ideas. Thanks, Peter. P.S. I'll be using SDCC on the 8051 Development Board from PJRC. |