| ??? 02/04/07 11:38 Read: times |
#131968 - Thanks for advice Responding to: ???'s previous message |
I really hate the idea of "pull a counter module from the library," Regarding the latter, the simulation (or emulation) tool: I use ModelSim with VHDL (or Verilog) test-benches. That's a fool's errand, also called "Burn And Crash." Yes, comprehensive test benches take time to write. Best luck CN |
| Topic | Author | Date |
| Layout tool choice (and a bit of VHDL) | 01/01/70 00:00 | |
| Tutorials/examples in the manual | 01/01/70 00:00 | |
| Manual is informative | 01/01/70 00:00 | |
| Collars and cuffs | 01/01/70 00:00 | |
| Still runnung around | 01/01/70 00:00 | |
| If you don't own it, ... | 01/01/70 00:00 | |
Stopped working? | 01/01/70 00:00 | |
| why no "FPGA integration" | 01/01/70 00:00 | |
| clearly generic ip blocks are pretty useless | 01/01/70 00:00 | |
| Agree | 01/01/70 00:00 | |
| Fun ? | 01/01/70 00:00 | |
| Thanks for advice | 01/01/70 00:00 | |
| this is about beginning - where do you want to end | 01/01/70 00:00 | |
| It's sometimes hard to predict :) | 01/01/70 00:00 |



