| ??? 12/18/98 11:53 Read: times |
#98 - RE: 8051 and memory mapping |
Mayby this helps you .
The RDN ,WRN pin from 2681 goes to the resp. RD and WR (=not)pin of the 805x. The reset is connected to the RST pin from the 805x. A0-A3(2681) is connected to the demultiplexed (using ALE)low adress byte of the 805x to select the disired registers in the 2681. INTRN (2681) goes to int0(805x). D0-D7 (2681)goes to the demuxed databus D0-D7 (805x).CEN (2681) is going to an adress decoder fed from 805x's high adress byte. THIS IS NOT TESTED, THIS IS THE PRINCIPLE. CHECK OUT TIMING DIAGRAMS. GREETINGS henk |
| Topic | Author | Date |
| 8051 and memory mapping | 01/01/70 00:00 | |
RE: 8051 and memory mapping | 01/01/70 00:00 |



