Hi Jack,

no manufacturer define the state of the the i/o pins
before reset was done.
The state 0FFh was always guarantee only after
reset was applied and minimal 2 cycle of the clock
source was done.
E.g. a crystal can need up to 20ms before it
work right and during this time the state of
the i/o pins was undefined.

Most device goes to high directly after power up,
but it was not guarantee.

I have seen, that the AT89C52 goes
high, but the AT89S8252 goes low after power up
until the crystal was working.

Also on the AT89C2051 the state during reset
can be eqal to the program verify command
(if some P3 pins are low driven inputs)
and then the port P1 toggles crazy during the
reset input was activated.


Peter