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???
04/11/09 10:28
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#164533 - Still not full ISR shown - and debounce?
Responding to: ???'s previous message
Note that your switch statement has a hard-coded "next" state - did you make use of an else together with the if statement to have a second switch statement for backwards mode?

By having more states in a single switch statement, your switch could handle both forward and backwards motion and stopped by just processing the current state and moving to a new state.

You might define:

1) You should consider defining all states in forward and direction mode, i.e.
enum {
    FWD_STOP_S1,
    FWD_STOP_S2,
    FWD_STOP_S3,
    FWD_STOP_S4,
    BKW_STOP_S1,
    BKW_STOP_S2,
    BKW_STOP_S3,
    BKW_STOP_S4,
    FWD_S1,
    FWD_S2,
    FWD_S3,
    FWD_S4,
    BKW_S1,
    BKW_S2,
    BKW_S3,
    BKW_S4
};
 

The two least significant bits (0x01 and 0x02) of the state is then used to store the current phase.
The next bit (0x04) is forward (0) or backward (1)
The next bit (0x08) is stopped (0) or running (1).

If the variable is bit-mapped, then the main loop may clear the 0x08 bit and the ISR will then step forwards or backwards (depending on the state of the 0x04 bit) until it reaches a full step, and then park there. Setting the 0x08 bit will get the motor to start again, using the same direction as before.

1ms is used to scan a key/switch or what? You did not post the full ISR source. Note that keys do not need to be scanned with 1ms frequency, and besides the scanning frequency, you must also properly debounce the key/switch or you may get several rotation reversals before the state of key/switch settles down to open or closed.

List of 40 messages in thread
TopicAuthorDate
how to avoid timer interrupt interrupts serial communication            01/01/70 00:00      
   Here the timing is relevant!            01/01/70 00:00      
   how to avoid timer interrupt interrupts serial communication            01/01/70 00:00      
      reply Kai            01/01/70 00:00      
         Do ms-class delays in any interrupt.            01/01/70 00:00      
            re: Per Westermark            01/01/70 00:00      
               ISR frequency * time significantly below 100%            01/01/70 00:00      
               Not sure, whether I got you...            01/01/70 00:00      
               That is not the main problem            01/01/70 00:00      
                  It's a common mistake...            01/01/70 00:00      
                     oops            01/01/70 00:00      
                        Long ISRs are no problem, unless...            01/01/70 00:00      
          instruction execution cycle/time in C language            01/01/70 00:00      
   ISR is set to 1ms but...            01/01/70 00:00      
      That is the problem            01/01/70 00:00      
         oops            01/01/70 00:00      
            What is the baud rate?            01/01/70 00:00      
               9600 baud            01/01/70 00:00      
                  He has got to be sitting in a interupt            01/01/70 00:00      
                     reply            01/01/70 00:00      
                        Many many more details needed!!            01/01/70 00:00      
                           reply Kai            01/01/70 00:00      
                              Further questions...            01/01/70 00:00      
                                 reply Kai            01/01/70 00:00      
                                    Who tells your micro how the stepper is to be moved?            01/01/70 00:00      
                                       reply            01/01/70 00:00      
                                          So, the stepper is running all the time?            01/01/70 00:00      
                                             ya...this is the purpose of having interrupt            01/01/70 00:00      
                                                Ok, then confirm this please...            01/01/70 00:00      
                                                   reply Kai            01/01/70 00:00      
                                                      Still delays in the ISR?            01/01/70 00:00      
                                                         reply per            01/01/70 00:00      
                                                      I suspect that your ISR is longer than 1msec!            01/01/70 00:00      
                                                         reply            01/01/70 00:00      
                                                         ISR code            01/01/70 00:00      
                                                            Post full ISR            01/01/70 00:00      
                                                               reply            01/01/70 00:00      
                                                                  Still not full ISR shown - and debounce?            01/01/70 00:00      
                                                                     Addendum            01/01/70 00:00      
   T_T            01/01/70 00:00      

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