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???
04/06/09 13:52
Modified:
  04/06/09 13:58
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 		 #164398 - It's a common mistake...
Responding to: ???'s previous message
...to make the ISR exessively long by putting everything into it, what has to be done when the timer ticks.

The deep meaning of a timer interrupt is not to kick-start everything that is to be done when the time ticks, but to remember the main program that something has to be done now. So, the fastest ISR would do nothing but only set a certain flag in RAM to remember the main program that the timer has ticked. This "remember flag" has periodically to be polled by the main program, of course.

The same with the serial transmission ISR. The fastest ISR would only save the received byte and would leave it to the main program to process it.

Kai

List of 40 messages in thread
TopicAuthorDate
how to avoid timer interrupt interrupts serial communication            01/01/70 00:00      
   Here the timing is relevant!            01/01/70 00:00      
   how to avoid timer interrupt interrupts serial communication            01/01/70 00:00      
      reply Kai            01/01/70 00:00      
         Do ms-class delays in any interrupt.            01/01/70 00:00      
            re: Per Westermark            01/01/70 00:00      
               ISR frequency * time significantly below 100%            01/01/70 00:00      
               Not sure, whether I got you...            01/01/70 00:00      
               That is not the main problem            01/01/70 00:00      
                  It's a common mistake...            01/01/70 00:00      
                     oops            01/01/70 00:00      
                        Long ISRs are no problem, unless...            01/01/70 00:00      
          instruction execution cycle/time in C language            01/01/70 00:00      
   ISR is set to 1ms but...            01/01/70 00:00      
      That is the problem            01/01/70 00:00      
         oops            01/01/70 00:00      
            What is the baud rate?            01/01/70 00:00      
               9600 baud            01/01/70 00:00      
                  He has got to be sitting in a interupt            01/01/70 00:00      
                     reply            01/01/70 00:00      
                        Many many more details needed!!            01/01/70 00:00      
                           reply Kai            01/01/70 00:00      
                              Further questions...            01/01/70 00:00      
                                 reply Kai            01/01/70 00:00      
                                    Who tells your micro how the stepper is to be moved?            01/01/70 00:00      
                                       reply            01/01/70 00:00      
                                          So, the stepper is running all the time?            01/01/70 00:00      
                                             ya...this is the purpose of having interrupt            01/01/70 00:00      
                                                Ok, then confirm this please...            01/01/70 00:00      
                                                   reply Kai            01/01/70 00:00      
                                                      Still delays in the ISR?            01/01/70 00:00      
                                                         reply per            01/01/70 00:00      
                                                      I suspect that your ISR is longer than 1msec!            01/01/70 00:00      
                                                         reply            01/01/70 00:00      
                                                         ISR code            01/01/70 00:00      
                                                            Post full ISR            01/01/70 00:00      
                                                               reply            01/01/70 00:00      
                                                                  Still not full ISR shown - and debounce?            01/01/70 00:00      
                                                                     Addendum            01/01/70 00:00      
   T_T            01/01/70 00:00      

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