The way I implement such a construct, presently, is to shadow the ROM, in my case, too slow for my MCU, into SRAM, which, once its most-significant location is written, becomes read-only, and takes the place of the ROM, which, I suppose, could be either EPROM, EEPROM, or FLASH. Software, after initialization, copies the ROM content into SRAM with an offset to skip the code which does nothing but the copying task, into the extra 64Kx8 SRAM, which, after completion of the copy process, becomes read-only program memory. When this is done, the ROM is disabled.

It's pretty easy, and, with a port bit, the write to the ROM space can be re-enabled, e.g. for patches. Once a patch is deemed successful, you can add it to the ROM code. My 805x develpment circuit uses a 27C512 and a pair of 61512's, which are VERY fast, hence, capable of supporting the Maxim/DALLAS DS89C4x0's at full speed.

RE