| ??? 08/06/12 10:07 Read: times Msg Score: +1 +1 Good Answer/Helpful |
#187996 - Altera FPGAs Responding to: ???'s previous message |
A lot of Altera FPGAs have multiple IO banks, so you can interface to 1.2V, 1.8V, 2.5V and 3.3V signal levels simultaneously. Sadly 5V tolerance is no longer widely supported. |
| Topic | Author | Date |
| CPLD level translators | 01/01/70 00:00 | |
| TI Voltage level translators ? | 01/01/70 00:00 | |
| thanks | 01/01/70 00:00 | |
| Why specifically CPLD? | 01/01/70 00:00 | |
| True | 01/01/70 00:00 | |
| Perhaps certain CPLD's would do the job | 01/01/70 00:00 | |
| Wide Vcc CPLDs sadly rare | 01/01/70 00:00 | |
| forgive my ignorance, but ... | 01/01/70 00:00 | |
| some examples | 01/01/70 00:00 | |
| Same for ARM | 01/01/70 00:00 | |
| some small devices have OCR too | 01/01/70 00:00 | |
| Bigger chips | 01/01/70 00:00 | |
Altera FPGAs | 01/01/70 00:00 |