| ??? 11/29/06 17:07 Read: times |
#128684 - FPGA conversion cost Responding to: ???'s previous message |
I just made my e-mail address public.
IF the 50K design can be made to work with a 0.35u process (i.e. speeds of < 75 MHz), and can tolerate a 3.3V or 5V supply, and IF there are less than 240 pins, and you have some sort of logic simulations for the design, then NRE = $25K, and 2K parts = ~$7-$8 USD. If you break the above rules, then we are talking about an 0.18u array. Then the NRE goes to $50K, and unit pricing can approach $50 USD, depending on the package. |
| Topic | Author | Date |
| Unknown pinouts application | 01/01/70 00:00 | |
| who can tell | 01/01/70 00:00 | |
| i did wonder why the ports were paralleled | 01/01/70 00:00 | |
| Serial Converter | 01/01/70 00:00 | |
| more information | 01/01/70 00:00 | |
| To... | 01/01/70 00:00 | |
| Yes but | 01/01/70 00:00 | |
| Hmm... | 01/01/70 00:00 | |
| What tells the scope? | 01/01/70 00:00 | |
| Nothing | 01/01/70 00:00 | |
| Level? | 01/01/70 00:00 | |
| What will happen | 01/01/70 00:00 | |
| Improper load? | 01/01/70 00:00 | |
| Jez see this | 01/01/70 00:00 | |
| Hhm, but this paralleling is widely used! | 01/01/70 00:00 | |
| Parallel MOS transistors are fine | 01/01/70 00:00 | |
| Perfectly safe? | 01/01/70 00:00 | |
| Reasonably safe | 01/01/70 00:00 | |
| What is this circuit intended to do, Ralph? | 01/01/70 00:00 | |
| What's it to do | 01/01/70 00:00 | |
What it does | 01/01/70 00:00 | |
| Just out of interest lynn, | 01/01/70 00:00 | |
| FPGA conversion cost | 01/01/70 00:00 |