| ??? 02/18/06 10:27 Read: times |
#110267 - no details about transition from logic 1 Responding to: ???'s previous message |
Hello Kai,
i went through the Bible (Chapter - Hardware Description) but couldn't find enough description regarding the transient conditions (from logic 1 to 0)in port(1,2,3). How should i compensate this Transient current effect, if i use a PNP based dirver circuit. -suresh. |
| Topic | Author | Date |
| AT89s52 Port pin clarifications: | 01/01/70 00:00 | |
| nice copy, where is the question | 01/01/70 00:00 | |
| output characteristics | 01/01/70 00:00 | |
| most confusing post | 01/01/70 00:00 | |
| Answers | 01/01/70 00:00 | |
| Logic 1 to 0 transition | 01/01/70 00:00 | |
| You haven't read the 'bible' chapter... | 01/01/70 00:00 | |
| no details about transition from logic 1 | 01/01/70 00:00 | |
| other way 'round | 01/01/70 00:00 | |
| There ARE!! | 01/01/70 00:00 | |
| pFET2 | 01/01/70 00:00 | |
| Weak and very weak pull-ups | 01/01/70 00:00 | |
| maintaining low source impedence? | 01/01/70 00:00 | |
| by making thje driver a sink............ | 01/01/70 00:00 | |
| Pull-downs create problems | 01/01/70 00:00 | |
| Maximum IOL per port pin: 10 mA ? | 01/01/70 00:00 | |
| IOL | 01/01/70 00:00 | |
| IOL = 10mA or 1.6mA? in port 1 | 01/01/70 00:00 | |
Depends on load | 01/01/70 00:00 |