| ??? 08/23/05 16:44 Read: times |
#99915 - pclk=cclk/2 Responding to: ???'s previous message |
UM_P89LPC920_921_922_1.pdf page 21 said:
• CCLK - CPU clock; There are two CCLK cycles per machine cycle, and most instructions are executed in one to two machine cycles (two or four CCLK cycles). • PCLK - Clock for the various peripheral devices and is CCLK/2. UM_P89LPC920_921_922_1.pdf page 41 said:
In the “Timer” function, the timer is incremented every PCLK. In original '51, timer was incremented each 12 oscillator cycles, while and each machine cycle consisted from 12 oscillator cycles. Here, timer is incremented each PCLK cycle which is once in 2 CCLK cycles; and a machine cycle is 2 CCLK cycles. So it seems to me compatible. There is no option to change this relationship AFAIK. There must be something else going wrong. Jan Waclawek |
| Topic | Author | Date |
| Porting 12clock/cy. x51 appl. to LPC92x | 01/01/70 00:00 | |
| pclk=cclk/2 | 01/01/70 00:00 | |
| check all timer/UART etc timings against | 01/01/70 00:00 | |
WatchDog ? | 01/01/70 00:00 |