Hello Everybody.

I just reviewed the whole message board and found some messages about emi. Some stuff is ok but i think i have to give some knowledge of my experience as an electronic development engineer responsible for design and emi testing to you all.

Franc Urban and Dieter Ziegler are right about most of their thoughts, but i have to add some points.

The resistors added to the vcc lines are ok and can be between 10 to 30 Ohm depending on the current.
This method is also good for all signal lines where we do not need a fast egde on digital signals. Rule : make them as slow as possible ! For digital Signals (Data Adress f.e. 30 to 150 Ohm are OK but have to be checked)

Use Multi Layer boards instead of 2 Layers. The cost of make a 2 Layerboard emi proof is much higher than the same board as a multi layer and less effective.
Think of the thickness of the prepags between the power planes. make them as thin as possible. (120um is normal but 60um is much better)
make the shape of the vcc plane smaler than the gnd plane (20 times the prepag thickness gives the value how much the corners of the vcc plane should be inside the gnd plane) this gives some dB ! and every dB counts !

i always hear to use some 100nF caps on power pins ! forget that ! if you do not believe make an ac analyses of a 100nF cap in SMT (do not forget the 1.5nH induktor that comes along with the footprint connectors) and what do you see. The caps are induktive at frequencies higher than 5MHz ! so what should they help us with cpu's running at 12, 24 or ... MHz ? Nothing. (imagine non smt caps a horror for emi, the wire is a induktor !)So. make those traces GND and VCC as short as possible and connect them direkt to the power planes. of course, you can place some 100nF next to the vias they help with lower frequencies and stabelize the power signal. thats all! I have designed a C515A-L24M board running at 24MHz with only a few caps calculated values and at the right places. the measurement based on "DIN EN55022 Class B" for conducted emisions showed no spikes higher than 20dBuV and the limit lines are more than 20dBuV away !

Some ideas are to use chokes on signals. hmm well if you make a more detailed look you will see some caps and induktors making some kind of filter. If these filters are OK you are lucky but they can also make things worse because they can rise some frequencies signal levels.

Whenever i leave the pcb with my signals on a connector f.e. i think about filtering. a 10pF cap to GND is in most cases useful. if the signal is an output with slow signal (serial lines < 500kHz) i also you some ferrits with a low resistance at "low" frequencies but some hundert ohms at frequencies higher than 50MHz (Hey a 24MHz cpu has lots of signals higher than 24MHz)

Some thoughts about software :

always initialize the whole systems, even if you think (and know) that some parts are never used ! or if the manufacture tells you something about values after reset ! We had a 8051 cpu with emi problems "ESD". the cpu changed the serial line from 9600 to 19200 baud and keept this also after the next software reset or hardware reset. only a power off helped. the reason was that we assumed some registers after reset being at defined values but (so the manual sayd) that was the problem. now if we want to have some bits set and others not, we programm them to be 1's and 0's.

There are a lot of thinks to be thought about emi. proper pcb, placement, schematic design, software and so on.
But do not think that you can solve the problem by putting the cpu into idle or power down mode. if there is a peak outside the allowed ranges, there is a chance that this peak will be seen during testing for CE marking and/or postal aprovents. (they make peak/quasi peak and average measurements and can change the sweep time. then they will see the peak definitely ! and you fail )

I think that is all for now and here. If there are questions left, you are welcome you ask me.

best regards.

Michael Schmitt