| ??? 03/17/00 07:10 Read: times |
#1862 - RE: synchronization |
> Which CPU ? Only some support a
> parity check. The ol' good 8051 supports "9N1" SPI mode. From a software side, this can correspond to 8N2, or 8x1 (odd, even, mark, space parity), just by playing with TB8 and RB8 at SCON. The one disadvantage of 9N1 is that you just can't receive a byte without a valid stop bit. Unfortunately, at the time I can't send any code examples. -- Tomas |
| Topic | Author | Date |
| synchronization | 01/01/70 00:00 | |
| RE: synchronization | 01/01/70 00:00 | |
| RE: synchronization | 01/01/70 00:00 | |
| RE: synchronization | 01/01/70 00:00 | |
| RE: synchronization | 01/01/70 00:00 | |
| RE: synchronization | 01/01/70 00:00 | |
| RE: synchronization | 01/01/70 00:00 | |
| RE: synchronization | 01/01/70 00:00 | |
| RE: synchronization | 01/01/70 00:00 | |
| RE: synchronization | 01/01/70 00:00 | |
RE: synchronization | 01/01/70 00:00 |



