| ??? 10/05/07 15:44 Read: times |
#145478 - IT in derivatives Responding to: ???'s previous message |
Be careful to make difference between 8052 and modern derivatives.
AT89C51 has 4 prior levels. I've been trying to imagine how they implemented this priority mechanism in a 4 level case. I think they designed a stack of 4 levels, in order each RETI is able to put back the level the IT interrupted. As lower level can not interrupt a higher one only increasing of ISR levels is possible while servicing an ISR. So there is no problem to change its own level in the ISR. Lowering would not have effect, increasing would make as if another higher level IT was serviced. But I would prefer the datasheet describes all that. This is the difference between Intel databooks and Atmel/ST ones (I've worked for ST :) ). |
| Topic | Author | Date |
| I tested changing prio level from the IT, it works | 01/01/70 00:00 | |
| you MUST be wrong | 01/01/70 00:00 | |
| For Erik | 01/01/70 00:00 | |
| redefine test | 01/01/70 00:00 | |
| what??? and comments | 01/01/70 00:00 | |
| what | 01/01/70 00:00 | |
| IT in derivatives | 01/01/70 00:00 | |
| Stored edges | 01/01/70 00:00 | |
| I'm still certain | 01/01/70 00:00 | |
| I don't see well what you mean. | 01/01/70 00:00 | |
| how about an answer | 01/01/70 00:00 | |
| you are right | 01/01/70 00:00 | |
just read \"the bible\" | 01/01/70 00:00 |