| ??? 07/06/07 22:53 Read: times |
#141564 - Compiler generated IRQ vectors Responding to: ???'s previous message |
Jan Waclawek said:
the compiler&linker will spit out something like this:
ORG 0Bh lcall RealISR reti ORG somewhere else RealISR: ... the compiled ISR code ... ret? JW Yes Jan, that is exactly what both Keil and SDCC do. What is quite nice is that they both produce: CPL P3_0 and RETI. with no extraneous register saves. I compiled my suggestion and found that with a AT89S8252 12clocker at 18.432MHz I could achieve 85kHz in C. replacing the LCALL RealISR in the vector table with the CPL P3_0 and RETI enabled me to get 110kHz. So unless you have a chip that can toggle a pin in hardware, a software ISR toggle is impossible with a 11MHz 12clocker. Perhaps the OP will come back with the actual chip that he wants to use. |
| Topic | Author | Date |
| How to generate 100 Khz square wave 80C51 | 01/01/70 00:00 | |
| Tips | 01/01/70 00:00 | |
| 1 KHz | 01/01/70 00:00 | |
| that's ... | 01/01/70 00:00 | |
| SI Units | 01/01/70 00:00 | |
| 1024 = Ki | 01/01/70 00:00 | |
| C interrupt overhead | 01/01/70 00:00 | |
| RE: C interrupt overhead | 01/01/70 00:00 | |
| and listen to the guru! :-) | 01/01/70 00:00 | |
| several reasons | 01/01/70 00:00 | |
| Yet another reason to avoid using HLL's! | 01/01/70 00:00 | |
| Optimizations | 01/01/70 00:00 | |
| Use Timer0 auo reload | 01/01/70 00:00 | |
| using | 01/01/70 00:00 | |
| interrupt vectoring vs. latency | 01/01/70 00:00 | |
| Then the Interupt must be in ASM | 01/01/70 00:00 | |
| do you mean... | 01/01/70 00:00 | |
| No | 01/01/70 00:00 | |
| Compiler generated IRQ vectors | 01/01/70 00:00 | |
| OOPS we both meant LJMP REALisr | 01/01/70 00:00 | |
| the original problem... | 01/01/70 00:00 | |
| Interrupt Latency + Vectoring + Service | 01/01/70 00:00 | |
| indufficient info | 01/01/70 00:00 | |
use MCS52 better option | 01/01/70 00:00 |