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???
04/20/06 05:53
Modified:
  04/20/06 05:56

Read: times


 
#114595 - like this
Responding to: ???'s previous message
kbd_out:
	   clr KBD_CLK    	;deassert kbd clock
	   setb KBD_DATA   	;
	   mov R2,#0ffh    	;wait more than 60 Mu Secs
	   djnz R2,$       	;this forces the kbd not to send 
				;get ready for transmission
	   mov R2,#9h      	;there are 9 bits to SEND(8 data , 1 parity)
	   mov C,P		;load carry flag with parity of data to be sent
	   cpl C           	;odd parity
	   clr KBD_DATA    	;request to send by making
	   setb KBD_CLK    	;clk = high, data = low
	   jb KBD_CLK,$    	;wait clk to become low
shout:
	   rrc A           	;shift next bit to carry flag
	   mov KBD_DATA,C  	;put it on the data line
	   jnb KBD_CLK,$   	;wait untill clock becomes high
	   jb KBD_CLK,$    	;wait clk to become low
	   djnz R2,shout   	;rep for all 9  bits
	   setb KBD_DATA   	;data line to read ack
	   jnb KBD_CLK,$   	;wait for ack
	   jb KBD_CLK,$    	;for next clock cycle
	   mov C,KBD_DATA  	;read ACK
	   jnb KBD_CLK,$
	   ret



bewere this routine doesnt uses timeouts and may stuck . refine them yourself.


Abhishek

List of 9 messages in thread
TopicAuthorDate
ps2 keyboard implementation.            01/01/70 00:00      
   ps2 keyboard implementation.            01/01/70 00:00      
      philips appnote            01/01/70 00:00      
         Maybe some info here...            01/01/70 00:00      
            Beyondlogic            01/01/70 00:00      
               host end            01/01/70 00:00      
                  like this            01/01/70 00:00      
                     reply            01/01/70 00:00      
   Off-topic??            01/01/70 00:00      

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