well, the serials need to run at 115k. The product is spec'd that way. I have a 32 byte ring buffer that is used by the serial ISR to save the incoming data, so that ISR is very short. The ring buffer is unloaded in the 1ms OS_Task.

Perhaps my logic is flawed. I thought that my combination of tests of the flags would cover all scenarios regardless of latency (within reason). I should probably spend some more brain-time on it.

The PCA is not very short, I will try to shorten it. But if there is a flaw in my logic, then there is no bulletproof solution.

When the pulse period is less than the PCA period, the math is correct every time, for very slow pulses I count 1ms ticks. Its the mid-range frequencies that I need to fix now where the PCA rollover was being used.

My backup plan is to generate a midrange timebase with T0, and poll that in the PCA ISR. For the midrange frequencies, the error from the latency should be liveable. Ugly, but should be ok.

I will post my results, thanks for all the feedback

Bob
(We should have lunch next time I'm in NC)