| ??? 11/08/05 21:39 Read: times |
#103444 - you're right. I took out the setting of Responding to: ???'s previous message |
the global variable in the ISR, because the loop stuff was definitely taking longer than 50 cycles. So it is guaranteed that the ADC will be done before the loop body completes, at least until I optimize the loop. The included ASM is what SDCC generated. It can be greatly optimized. Rather than recalculate the effective address of s[28+y], s[29+y], etc. I will just put inline asm "inc dptr" instructions, effectively building on the previously calculated address of the previous loop iteration. But I have to first figure out the problem with the ADC. Thanks for your help.
for (y = 0; y < 224; y += 4) {
ADCON = 8;
s[28+y] = TH0;
s[29+y] = TL0;
s[30+y] = sadch >> 6;
s[31+y] = (sadch << 2) | (sadcon >> 6);
sadch = ADCH;
sadcon = ADCON;
}
void adc_intr() interrupt 10 _naked using 0 {
_asm
push acc
_endasm;
ADCON &= 0xc0;
_asm
pop acc
_endasm;
}
;udp_adc.c:35: for (y = 0; y < 224; y += 4) {
; genAssign
mov _y,#0x00
00118$:
; genCmpLt
; genCmp
clr c
mov a,_y
subb a,#0xE0
; genIfxJump
; Peephole 108 removed ljmp by inverse jump logic
jnc 00121$
00144$:
;udp_adc.c:36: ADCON = x;
; genAssign
mov _ADCON,_x
;udp_adc.c:37: s[28+y] = TH0;
; genPlus
mov a,#0x1C
add a,_y
; genPlus
add a,#_s
mov dpl,a
; Peephole 240 use clr instead of addc a,#0
clr a
addc a,#(_s >> 8)
mov dph,a
; genPointerSet
; genFarPointerSet
mov a,_TH0
movx @dptr,a
;udp_adc.c:38: s[29+y] = TL0;
; genPlus
mov a,#0x1D
add a,_y
; genPlus
add a,#_s
mov dpl,a
; Peephole 240 use clr instead of addc a,#0
clr a
addc a,#(_s >> 8)
mov dph,a
; genPointerSet
; genFarPointerSet
mov a,_TL0
movx @dptr,a
;udp_adc.c:39: s[30+y] = sadch >> 6;
; genPlus
mov a,#0x1E
add a,_y
; genPlus
add a,#_s
add a,#_s
mov dpl,a
; Peephole 240 use clr instead of addc a,#0
clr a
addc a,#(_s >> 8)
mov dph,a
; genRightShift
; genRightShiftLiteral
; genrshOne
mov a,_sadch
rl a
rl a
anl a,#0x03
; genPointerSet
; genFarPointerSet
; Peephole 105 removed redundant mov
mov r2,a
movx @dptr,a
;udp_adc.c:40: s[31+y] = (sadch << 2) | (sadcon >> 6);
; genPlus
mov a,#0x1F
add a,_y
; genPlus
add a,#_s
mov dpl,a
; Peephole 240 use clr instead of addc a,#0
clr a
addc a,#(_s >> 8)
mov dph,a
; genLeftShift
; genLeftShiftLiteral
; genlshOne
mov a,_sadch
add a,acc
add a,acc
mov r2,a
; genRightShift
; genRightShiftLiteral
; genrshOne
mov a,_sadcon
rl a
rl a
anl a,#0x03
; genOr
; Peephole 105 removed redundant mov
mov r3,a
orl ar2,a
; genPointerSet
; genFarPointerSet
mov a,r2
movx @dptr,a
;udp_adc.c:41: sadch = ADCH;
; genAssign
mov _sadch,_ADCH
;udp_adc.c:42: sadcon = ADCON;
; genAssign
mov _sadcon,_ADCON
;udp_adc.c:35: for (y = 0; y < 224; y += 4) {
; genPlus
; genPlusIncr
mov a,_y
add a,#0x04
mov _y,a
; Peephole 112.b changed ljmp to sjmp
sjmp 00118$
00121$:
;udp_adc.c:44: send_udp(224);
; genCall
; Peephole 182.b used 16 bit load of dptr
mov dptr,#0x00E0
lcall _send_udp
ljmp 00101$
00122$:
ret
|
| Topic | Author | Date |
| Timing of A/D conversion on 80c552 | 01/01/70 00:00 | |
| show your code | 01/01/70 00:00 | |
| sorry, here is the loop and the ISR | 01/01/70 00:00 | |
| I see no such thing, please cut and past | 01/01/70 00:00 | |
| you're right. I took out the setting of | 01/01/70 00:00 | |
| PLEASE cut and paste, as is it will not | 01/01/70 00:00 | |
| OK, nevermind. The whole code is way too | 01/01/70 00:00 | |
| often the reason for an unexplainable pr | 01/01/70 00:00 | |
Funny you mention that | 01/01/70 00:00 | |
| inconsistent | 01/01/70 00:00 | |
| since wwe all know that you get what you | 01/01/70 00:00 | |
| True. I fully expect to have to study | 01/01/70 00:00 |



