| ??? 10/24/05 14:26 Modified: 10/24/05 14:42 Read: times |
#102833 - eh... Responding to: ???'s previous message |
Shawn Nemat said:
I'm using a 2698B UART, I think those interrupts are level-triggered but I'll check the datasheet again just to make sure. As you are connecting them to 8051 /INTx inputs , they should be output of the some block. how can a output be level triggered? I think you use edge triggered input so that the flag can be remebered and CPU cant be interrupted again if ith int pulse still remains low after e you serviced the interrupt. Abhishek |
| Topic | Author | Date |
| interrupts recieved during downtime | 01/01/70 00:00 | |
| Bible says | 01/01/70 00:00 | |
| I saw that too | 01/01/70 00:00 | |
| sample and hold | 01/01/70 00:00 | |
| thus the cirrect answer to the original | 01/01/70 00:00 | |
| Correct ? | 01/01/70 00:00 | |
| if it is level, it need to remain | 01/01/70 00:00 | |
| yes | 01/01/70 00:00 | |
| If this is what you ment then | 01/01/70 00:00 | |
| Interrupt | 01/01/70 00:00 | |
| why? | 01/01/70 00:00 | |
| here's why | 01/01/70 00:00 | |
eh... | 01/01/70 00:00 | |
| sample and hold | 01/01/70 00:00 |