Next time post such question to: www.keil.com/discuss

Here is an example of such assembly file, in C you declare functions as external like:
extern unsigned char i2c_read (bit last);

;----------------------------------------------------------------------
; Program name : I2C.A51
; Author : Urbanc Franc
; Date : 5.avg.1996
; Version : V 1.1 (15.dec.1998)
; Compiler : Keil A51 V5.04
; Processor : 8051 and derivates
;
; - Low-Level I2C Driver Functions with SLAVE slow-down option.
;
; - void i2c_start(); Start I2C communication
; - void i2c_stop(); Stop I2C communication
; - bit i2c_write(unsigned char d);
; Write byte 'd' to I2C bus, return code:
; 0 - slave ACK ok
; 1 - fault, no slave ACK
; - unsigned char i2c_read (bit last);
; Read byte from I2C bus, bit 'last' enable
; sequential read - master acknowledge:
; 0 - more to go, master ACK
; 1 - last byte, no master ACK
; - void i2c_recover ();
; Recover i2c - interrupted bus data transfer (wdog reset)
;
; !!! Declare SCL and SDA lines here. In main C51 program declare
; SCL and SDA as external.
;
; (In C51 V5.02 all routines with parameter passing in registers
; are flagged with '_' , all others are not.)
;
;----------------------------------------------------------------------

$NOMOD51
$INCLUDE (C:C51ASMREG550.INC)

NAME I2C_IO

?PR?I2C_START?I2C_IO SEGMENT CODE INBLOCK
?PR?I2C_STOP?I2C_IO SEGMENT CODE INBLOCK
?PR?_I2C_WRITE?I2C_IO SEGMENT CODE INBLOCK
?PR?I2C_READ?I2C_IO SEGMENT CODE INBLOCK
?PR?I2C_RECOVER?I2C_IO SEGMENT CODE INBLOCK
?BI?I2C_READ?I2C_IO SEGMENT BIT OVERLAYABLE

;!!!!!!!! declare your SCL and SDA lines here !!!!!!!!!!!!!!!!!!!!!

SDA bit P0.0 ;I2C SDA, SCL line
SCL bit P0.1

public SDA, SCL
public ?i2c_read?bit ;public 'last' bit

RSEG ?BI?I2C_READ?I2C_IO

last: DBIT 1
?i2c_read?bit bit last

$REGUSE i2c_start ()
$REGUSE i2c_stop ()
$REGUSE _i2c_write (R1,A,PSW)
$REGUSE i2c_read (R7,R1,A,PSW)
$REGUSE i2c_recover (R7)

PUBLIC i2c_start ;public routine names
PUBLIC i2c_stop
PUBLIC i2c_read
PUBLIC _i2c_write
PUBLIC i2c_recover

;***************** MACRO definitions *********************************

Bit_Delay MACRO
nop
nop
ENDM

Set_SCL MACRO
setb SCL
jnb SCL,$
Bit_Delay
ENDM

Clr_SCL MACRO
clr SCL
Bit_Delay
ENDM

;***************** MACRO definitions end******************************

RSEG ?PR?I2C_START?I2C_IO

i2c_start: setb SDA ;SDA high
set_SCL ;SCL high
clr SDA ;drop SDA
Bit_Delay ;wait a moment
clr SCL ;then drop SCL
ret

;----------------------------------------------------------------------

RSEG ?PR?I2C_STOP?I2C_IO

i2c_stop: clr SDA ;SDA low
Set_SCL ;SCL high
setb SDA ;then SDA high
Bit_Delay ;wait a moment
ret

;----------------------------------------------------------------------

RSEG ?PR?_I2C_WRITE?I2C_IO

_i2c_write: mov a,r7 ;char passed in R7
mov r1,#8 ;8 bits to send
write: rlc a
mov SDA,c ;put bit on pin
Set_SCL ;emit clock pulse
Clr_SCL
djnz r1,write ;loop until done
setb SDA ;release data pin
Set_SCL ;SCL high
mov c,SDA ;set ACK error code
Clr_SCL ;drop SCL
ret ;c = 1, error no slave ACK

;----------------------------------------------------------------------

RSEG ?PR?I2C_READ?I2C_IO

i2c_read: mov r1,#8 ;8 bits to receive
read: Set_SCL ;SCL high
mov c,SDA ;pick bit off of pin
rlc a
Clr_SCL ;SCL low
djnz r1,read ;more bits to receive?
mov c,last ;last = 1, no master ACK
mov SDA,c ;last = 0, master ACK
Set_SCL ;emit ACK clock pulse
Clr_SCL
setb SDA ;SDA high
mov r7,a ;return data in R7
ret

;----------------------------------------------------------------------

RSEG ?PR?I2C_RECOVER?I2C_IO

i2c_recover: clr SCL
setb SDA
mov r7,#9 ;8 bits + ACK
jb SDA,i2c_recexit ;check if SDA line forced low by slave
i2c_recloop: Set_SCL ;emit clock pulse
Clr_SCL
jb SDA,i2c_recexit ;SDA released?
djnz r7,i2c_recloop ;no, repeat
i2c_recexit: ljmp i2c_stop ;yes, exit and stop i2c communication

;----------------------------------------------------------------------

end