architecture foo of bar is
    signal count : unsigned(15 downto 0);
    signal mux : std_logic;
    signal this, that, theother : std_logic; -- mux inputs
begin -- architecture 
    CountAndMux : process(clk) is
    begin
        if rising_edge(clk) then
            if (rst = '1') then
                count <= (others => '0');
                mux <= '0';
            else
                count <= (count + 1) mod 65536;
                FooMux : case count(1 downto 0) is
                    when "00" =>
                        mux <= '0';
                    when "01" =>
                        mux <= this;
                    when "10" =>
                        mux <= that;
                    when "11" =>
                        mux <= theother;
                end case Foomux;
            end if; -- reset
        end if; -- clock
    end process CountAndMux;
end architecture foo;