/* memory mapped I/0 registers to control memory mapping for Phytec microMODUL-8051 */
	#define PHYTEC_CTL1_REG (unsigned char xdata *)0xFC00
	#define PHYTEC_CTL2_REG (unsigned char xdata *)0xFC01
	#define PHYTEC_ADDR_REG (unsigned char xdata *)0xFC02
	#define PHYTEC_MASK_REG (unsigned char xdata *)0xFC03

	/* Configure Memory mapping (Phytec microMODUL-8051 specific): 0-7FFF CODE  8000-FFFF  XRAM+CODE */
	*PHYTEC_ADDR_REG=0x00;
	*PHYTEC_MASK_REG=0x7C;
	*PHYTEC_CTL1_REG=0x12;