////////////////////////////////////////////////////////////
//
//  ISR 1: void ISR_T0 (void)
//

void ISR_T0 (void) interrupt 1 using 1
{
U8  T0Ctemp;

  SB0_TCON_TR0 = 0;
  S0_TH0 = HIGH1M1m;
  S0_TL0 = LOW1M1m;
  SB0_TCON_TR0 = 1;

// 1ms counters
  for (T0Ctemp = CNT_1MSE; T0Ctemp != 0 ; T0Ctemp-- )
  {
    if ((GCXA1mse-1)[T0Ctemp])
    {
      (GCXA1mse-1)[T0Ctemp]--;
    }
  }
// 10ms counters  
  if (GCXA1mse[T1M_CNT] == 0)
  {
    GCXA1mse[T1M_CNT] = 10;
    for (T0Ctemp = CNT_10MS; T0Ctemp != 0 ; T0Ctemp-- )
    {
      if ((GCXA10ms-1)[T0Ctemp])
      {
        (GCXA10ms-1)[T0Ctemp]--;
      }
    }
// 100ms counters
    if (GCXA10ms[T10M_CNT] == 0)
    {
      GCXA10ms[T10M_CNT] = 10;
      for (T0Ctemp = CNT_100M; T0Ctemp != 0 ; T0Ctemp-- )
      {
        if ((GCXA100m-1)[T0Ctemp])
        {
          (GCXA100m-1)[T0Ctemp]--;
        }
      }
// 1 sec counters
      if (GCXA100m[T100M_CNT] == 0)
      {
        GCXA100m[T100M_CNT] = 10;
        for (T0Ctemp = CNT_1SEC; T0Ctemp != 0 ; T0Ctemp-- )
        {
          if ((GCXA1sec-1)[T0Ctemp])
          {
            (GCXA1sec-1)[T0Ctemp]--;
          }
        }
      }
    }
  }
}  // end ISR_T0